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- Path: newshub.sdsu.edu!dickory!papowell
- From: papowell@dickory.sdsu.edu (Patrick Powell)
- Newsgroups: comp.os.os9,comp.sys.m68k
- Subject: Re: 68332 CSBOOT* help?
- Followup-To: comp.os.os9,comp.sys.m68k
- Date: 22 Jan 1996 15:12:44 GMT
- Organization: San Diego State University
- Message-ID: <4e09hc$t1l@hole.sdsu.edu>
- References: <4dkvv8$v65@linux.cpsc.ucalgary.ca>
- NNTP-Posting-Host: dickory.sdsu.edu
-
- Russell Magee (magee@cpsc.ucalgary.ca) wrote:
- : Hello all,
-
- : I feel bad asking this question, but I'm under the gun, so to speak, and
- : my boss is getting very uncomfortable with some upcoming deadlines, so I'd
- : appreciate any info!
-
- : The situation is this: We're in the process of porting OS-9 to a 68332
- : system with SRAM, serial stuff etc. Now according to the board's designer,
- : the system has been designed to be as close to the 68332 EVS as possible.
- : There are two major (minor?) differences, though: the static RAM's
- : Write chip selects are swapped with respect to the EVS's RAM setup (CS0-1).
- : No prob, that's just a minor change in the config files and a new make of
- : RomBug. Second difference, the EPROM is one 16-bit wide 27C1024 instead of
- : two 8-bit wide EPROMS.
-
- : It made sense (to me) to get OS-9's RomBug up and running on the EVS first.
- : So far, so good. RomBug comes up fine. Now, I try out the slightly massaged
- : RomBug on our '332 system, and PLOP. Nothing, except the CPU gets stuck in
- : an endless cycle of RESET*/HALT*. However, if I assemble the SAME code, but
- : at origin $0 instead of origin $60000 (where the EVS expects its ROM), the
- : CPU actually seems to start out ok. (A logic analyzer we borrowed actually
- : showed the initial SP/PC fetch, and the first few branch instructions being
- : found in the EPROM, from base $0.)
-
- : I can't seem to figure out how CSBOOT* is mapping the EPROM in the '332's
- : address space. The EVS executes Rombug fine at $60000; the start of the
- : EPROM is like this:
-
- : Offset 00 01 02 03 04 05 06 07 . . .
- : ------ -- -- -- -- -- -- -- --
- : $00000 00 00 49 00 00 06 04 c4 ..
-
- : This means the CPU's initial SP will be $4900, PC will be $6004c4, which
- : works. But HOW does the EVS find the EPROM at $60000 immediately after
- : bootup? My understanding of the 332 is that the EPROM (and all other
- : peripherals hooked up to the chip select lines) must be mapped into
- : memory by the boot code (via the CSAR/CSORs). If this is so, how does
- : the EPROM get up to $60000 at the very start?
-
- : A local hardware guru we've talked to says that the '332 must execute
- : the EPROM from $0.l after a reset, then the software must remap the EPROM
- : afterward if desired.
-
- : Sorry for the long message. I am kind of at a dead end here...email replies
- : would be appreciated.
-
- : -Russ Magee
- : magee@cpsc.ucalgary.ca
-
- Russ, the 68332 has a special signal sequence that is sent out during
- the first couple of memory accesses after reset. This signal sequence
- is usually decoded by a PAL to produce a BOOT ROM Chip Select signal.
-
- In addition, usually the address signals are decoded as well, allowing the
- Boot Rom to be accesss. Now the 68332 also has on-chip memory decoding,
- which allows some of the output pins to be used as chip selects.
- So you can get some pretty strange effects if you do not know what you
- are doing at the hardware/software level.
-
- Moral of the story: you need the PAL equations for the support chips,
- a circuit diagram, AND a COMPLETE listing of the startup code.
- Then you start poking around... for weeks sometimes...
-
- I am curious - who is making the EVS clone? I would be interested in a
- couple of these.
-
- --
- Prof. Patrick Powell
- Dept. Electrical and Computer Engineering,
- San Diego State University,
- San Diego, CA 92182-1309
- Office (619) 594-7796; Lab (619) 594-7578 FAX (619) 594-7577
- email: papowell@sdsu.edu
-